stm32 /stm32h5 /STM32H533 /CRS /CRS_ISR

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Interpret as CRS_ISR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SYNCOKF 0 (B_0x0)SYNCWARNF 0 (B_0x0)ERRF 0 (B_0x0)ESYNCF 0 (B_0x0)SYNCERR 0 (B_0x0)SYNCMISS 0 (B_0x0)TRIMOVF 0 (B_0x0)FEDIR 0FECAP

SYNCERR=B_0x0, SYNCMISS=B_0x0, ESYNCF=B_0x0, ERRF=B_0x0, FEDIR=B_0x0, TRIMOVF=B_0x0, SYNCWARNF=B_0x0, SYNCOKF=B_0x0

Description

CRS interrupt and status register

Fields

SYNCOKF

SYNC event OK flag

0 (B_0x0): No SYNC event OK signaled

1 (B_0x1): SYNC event OK signaled

SYNCWARNF

SYNC warning flag

0 (B_0x0): No SYNC warning signaled

1 (B_0x1): SYNC warning signaled

ERRF

Error flag

0 (B_0x0): No synchronization or trimming error signaled

1 (B_0x1): Synchronization or trimming error signaled

ESYNCF

Expected SYNC flag

0 (B_0x0): No expected SYNC signaled

1 (B_0x1): Expected SYNC signaled

SYNCERR

SYNC error

0 (B_0x0): No SYNC error signaled

1 (B_0x1): SYNC error signaled

SYNCMISS

SYNC missed

0 (B_0x0): No SYNC missed error signaled

1 (B_0x1): SYNC missed error signaled

TRIMOVF

Trimming overflow or underflow

0 (B_0x0): No trimming error signaled

1 (B_0x1): Trimming error signaled

FEDIR

Frequency error direction

0 (B_0x0): Up-counting direction, the actual frequency is above the target

1 (B_0x1): Down-counting direction, the actual frequency is below the target

FECAP

Frequency error capture

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