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stm32 /stm32h5 /STM32H533 /FDCAN /FDCAN_ECR

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Interpret as FDCAN_ECR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TEC0REC0 (B_0x0)RP 0CEL

RP=B_0x0

Description

FDCAN error counter register

Fields

TEC

Transmit error counter
REC

Receive error counter
RP

Receive error passive

0 (B_0x0): The receive error counter is below the error passive level of 128.

1 (B_0x1): The receive error counter has reached the error passive level of 128.
CEL

CAN error logging

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32