stm32 /stm32h5 /STM32H533 /FLASH /FLASH_SECCR

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Interpret as FLASH_SECCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LOCK 0 (B_0x0)PG 0 (B_0x0)SER 0 (B_0x0)BER 0 (FW)FW 0 (STRT)STRT 0 (B_0x00)SNB0 (B_0x0)MER 0 (B_0x0)EOPIE 0 (B_0x0)WRPERRIE 0 (B_0x0)PGSERRIE 0 (B_0x0)STRBERRIE 0 (B_0x0)INCERRIE 0 (B_0x0)OBKERRIE 0 (B_0x0)OBKWERRIE 0 (INV)INV 0 (B_0x0)BKSEL

SNB=B_0x00, PG=B_0x0, BKSEL=B_0x0, EOPIE=B_0x0, STRBERRIE=B_0x0, SER=B_0x0, MER=B_0x0, LOCK=B_0x0, PGSERRIE=B_0x0, WRPERRIE=B_0x0, INCERRIE=B_0x0, OBKERRIE=B_0x0, BER=B_0x0, OBKWERRIE=B_0x0

Description

FLASH secure control register

Fields

LOCK

configuration lock bit

0 (B_0x0): FLASH_SECCR register unlocked

1 (B_0x1): FLASH_SECCR register locked

PG

programming control bit

0 (B_0x0): programming disabled

1 (B_0x1): programming enabled

SER

sector erase request

0 (B_0x0): sector erase not requested

1 (B_0x1): sector erase requested

BER

erase request

0 (B_0x0): bank erase not requested

1 (B_0x1): bank erase requested

FW

write forcing control bit

STRT

erase start control bit

SNB

sector erase selection number

0 (B_0x00): Sector 0 selected

1 (B_0x01): Sector 1 selected

127 (B_0x7F): Sector 127 selected

MER

mass erase request

0 (B_0x0): mass erase not requested

1 (B_0x1): mass erase requested

EOPIE

end of operation interrupt control bit

0 (B_0x0): no interrupt generated at the end of operation.

1 (B_0x1): interrupt enabled when at the end of operation

WRPERRIE

write protection error interrupt enable bit

0 (B_0x0): no interrupt generated when a protection error occurs

1 (B_0x1): interrupt generated when a protection error occurs

PGSERRIE

programming sequence error interrupt enable bit

0 (B_0x0): no interrupt generated when a sequence error occurs

1 (B_0x1): interrupt generated when sequence error occurs

STRBERRIE

strobe error interrupt enable bit

0 (B_0x0): no interrupt generated when a strobe error occurs

1 (B_0x1): interrupt generated when strobe error occurs.

INCERRIE

inconsistency error interrupt enable bit

0 (B_0x0): no interrupt generated when a inconsistency error occurs

1 (B_0x1): interrupt generated when a inconsistency error occurs.

OBKERRIE

OBK general error interrupt enable bit

0 (B_0x0): no interrupt is generated on OBK general access error

1 (B_0x1): an interrupt is generated on OBK general access error

OBKWERRIE

OBK write error interrupt enable bit

0 (B_0x0): no interrupt is generated on OBK write error

1 (B_0x1): an interrupt is generated on OBK write error

INV

Flash memory security state invert.

BKSEL

Bank selector bit

0 (B_0x0): Bank1 is selected for Bank erase / sector erase / interrupt enable

1 (B_0x1): Bank2 is selected for BER / SER

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