CTB2=B_0x0, MODE=B_0x0, NRFS=B_0x0, CTB1=B_0x0
SDRAM Command Mode register
| MODE | Command mode 0 (B_0x0): Normal Mode 1 (B_0x1): Clock Configuration Enable 2 (B_0x2): PALL (All Bank Precharge) command 3 (B_0x3): Auto-refresh command 4 (B_0x4): Load Mode Register 5 (B_0x5): Self-refresh command 6 (B_0x6): Power-down command |
| CTB2 | Command Target Bank 2 0 (B_0x0): Command not issued to SDRAM Bank 2 1 (B_0x1): Command issued to SDRAM Bank 2 |
| CTB1 | Command Target Bank 1 0 (B_0x0): Command not issued to SDRAM Bank 1 1 (B_0x1): Command issued to SDRAM Bank 1 |
| NRFS | Number of Auto-refresh 0 (B_0x0): 1 Auto-refresh cycle 1 (B_0x1): 2 Auto-refresh cycles 14 (B_0xE): 15 Auto-refresh cycles 15 (B_0xF): 16 Auto-refresh cycles |
| MRD | Mode Register definition |