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stm32 /stm32h5 /STM32H533 /IWDG /IWDG_EWCR

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Interpret as IWDG_EWCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0EWIT0 (EWIC)EWIC 0 (B_0x0)EWIE

EWIE=B_0x0

Description

IWDG early wake-up interrupt register

Fields

EWIT

Watchdog counter window value
EWIC

Watchdog early interrupt acknowledge
EWIE

Watchdog early interrupt enable

0 (B_0x0): The early interrupt interface is disabled.

1 (B_0x1): The early interrupt interface is enabled.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32