stm32 /stm32h5 /STM32H533 /LPUART /LPUART_ISR_ALTERNATE1

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Interpret as LPUART_ISR_ALTERNATE1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)PE 0 (B_0x0)FE 0 (B_0x0)NE 0 (ORE)ORE 0 (B_0x0)IDLE 0 (B_0x0)RXNE 0 (TC)TC 0 (B_0x0)TXE 0 (B_0x0)CTSIF 0 (B_0x0)CTS 0 (B_0x0)BUSY 0 (B_0x0)CMF 0 (B_0x0)SBKF 0 (B_0x0)RWU 0 (WUF)WUF 0 (TEACK)TEACK 0 (REACK)REACK

IDLE=B_0x0, CMF=B_0x0, SBKF=B_0x0, TXE=B_0x0, RXNE=B_0x0, CTS=B_0x0, FE=B_0x0, BUSY=B_0x0, CTSIF=B_0x0, RWU=B_0x0, NE=B_0x0, PE=B_0x0

Description

LPUART interrupt and status register

Fields

PE

Parity error

0 (B_0x0): No parity error

1 (B_0x1): Parity error

FE

Framing error

0 (B_0x0): No Framing error is detected

1 (B_0x1): Framing error or break character is detected

NE

Start bit noise detection flag

0 (B_0x0): No noise is detected

1 (B_0x1): Noise is detected

ORE

Overrun error

1 (B_0x1): Overrun error is detected

IDLE

Idle line detected

0 (B_0x0): No Idle line is detected

1 (B_0x1): Idle line is detected

RXNE

Read data register not empty

0 (B_0x0): Data is not received

1 (B_0x1): Received data is ready to be read.

TC

Transmission complete

TXE

Transmit data register empty

0 (B_0x0): Data register full

1 (B_0x1): Data register empty

CTSIF

CTS interrupt flag

0 (B_0x0): No change occurred on the CTS status line

1 (B_0x1): A change occurred on the CTS status line

CTS

CTS flag

0 (B_0x0): CTS line set

1 (B_0x1): CTS line reset

BUSY

Busy flag

0 (B_0x0): LPUART is idle (no reception)

1 (B_0x1): Reception ongoing

CMF

Character match flag

0 (B_0x0): No Character match detected

1 (B_0x1): Character match detected

SBKF

Send break flag

0 (B_0x0): No break character transmitted

1 (B_0x1): Break character transmitted

RWU

Receiver wake-up from mute mode

0 (B_0x0): Receiver in active mode

1 (B_0x1): Receiver in mute mode

WUF

Wake-up from low-power mode flag

TEACK

Transmit enable acknowledge flag

REACK

Receive enable acknowledge flag

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