RegViz: Visualize RCC_AHB2LPENR Bitfield

stm32 /stm32h5 /STM32H533 /RCC /RCC_AHB2LPENR

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Interpret as RCC_AHB2LPENR

SRAM3LPEN=B_0x0, RNGLPEN=B_0x0, DAC1LPEN=B_0x0, GPIOILPEN=B_0x0, GPIOHLPEN=B_0x0, GPIOALPEN=B_0x0, PKALPEN=B_0x0, AESLPEN=B_0x0, GPIOGLPEN=B_0x0, SAESLPEN=B_0x0, GPIOFLPEN=B_0x0, SRAM2LPEN=B_0x0, GPIODLPEN=B_0x0, GPIOCLPEN=B_0x0, HASHLPEN=B_0x0, ADCLPEN=B_0x0, GPIOELPEN=B_0x0, DCMI_PSSILPEN=B_0x0, GPIOBLPEN=B_0x0

Description

RCC AHB2 sleep clock register

Fields

GPIOALPEN	GPIOA clock enable during Sleep mode 0 (B_0x0): GPIOA peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOA peripheral clock enabled during Sleep mode (default after reset)
GPIOBLPEN	GPIOB clock enable during Sleep mode 0 (B_0x0): GPIOB peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOB peripheral clock enabled during Sleep mode (default after reset)
GPIOCLPEN	GPIOC clock enable during Sleep mode 0 (B_0x0): GPIOC peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOC peripheral clock enabled during Sleep mode (default after reset)
GPIODLPEN	GPIOD clock enable during Sleep mode 0 (B_0x0): GPIOD peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOD peripheral clock enabled during Sleep mode (default after reset)
GPIOELPEN	GPIOE clock enable during Sleep mode 0 (B_0x0): GPIOE peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOE peripheral clock enabled during Sleep mode (default after reset)
GPIOFLPEN	GPIOF clock enable during Sleep mode 0 (B_0x0): GPIOF peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOF peripheral clock enabled during Sleep mode (default after reset)
GPIOGLPEN	GPIOG clock enable during Sleep mode 0 (B_0x0): GPIOG peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOG peripheral clock enabled during Sleep mode (default after reset)
GPIOHLPEN	GPIOH clock enable during Sleep mode 0 (B_0x0): GPIOH peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOH peripheral clock enabled during Sleep mode (default after reset)
GPIOILPEN	GPIOI clock enable during Sleep mode 0 (B_0x0): GPIOI peripheral clock disabled during Sleep mode 1 (B_0x1): GPIOI peripheral clock enabled during Sleep mode (default after reset)
ADCLPEN	ADC1 and 2 peripherals clock enable during Sleep mode 0 (B_0x0): ADC1 and 2 peripherals clock disabled during Sleep mode 1 (B_0x1): ADC1 and 2 peripherals clock enabled during Sleep mode (default after reset)
DAC1LPEN	DAC clock enable during Sleep mode 0 (B_0x0): DAC peripheral clock disabled during Sleep mode 1 (B_0x1): DAC peripheral clock enabled during Sleep mode (default after reset)
DCMI_PSSILPEN	digital camera interface clock enable during Sleep mode (DCMI or PSSI depending which interface is active) 0 (B_0x0): DCMI/PSSI peripheral clock disabled during Sleep mode 1 (B_0x1): DCMI/PSSI peripheral clock enabled during Sleep mode (default after reset)
AESLPEN	AES clock enable during Sleep mode 0 (B_0x0): AES peripheral clock disabled during Sleep mode 1 (B_0x1): AES peripheral clock enabled during Sleep mode (default after reset)
HASHLPEN	HASH clock enable during Sleep mode 0 (B_0x0): HASH peripheral clock disabled during Sleep mode 1 (B_0x1): HASH peripheral clock enabled during Sleep mode (default after reset)
RNGLPEN	RNG clock enable during Sleep mode 0 (B_0x0): RNG peripheral clock disabled during Sleep mode 1 (B_0x1): RNG peripheral clock enabled during Sleep mode (default after reset)
PKALPEN	PKA clock enable during Sleep mode 0 (B_0x0): PKA peripheral clock disabled during Sleep mode 1 (B_0x1): PKA peripheral clock enabled during Sleep mode (default after reset)
SAESLPEN	SAES clock enable during Sleep mode 0 (B_0x0): SAES peripheral clock disabled during Sleep mode 1 (B_0x1): SAES peripheral clock enabled during Sleep mode (default after reset)
SRAM2LPEN	SRAM2 clock enable during Sleep mode 0 (B_0x0): SRAM2 peripheral clock disabled during Sleep mode 1 (B_0x1): SRAM2 peripheral clock enabled during Sleep mode (default after reset)
SRAM3LPEN	SRAM3 clock enable during Sleep mode 0 (B_0x0): SRAM3 peripheral clock disabled during Sleep mode 1 (B_0x1): SRAM3 peripheral clock enabled during Sleep mode (default after reset)

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