stm32 /stm32h5 /STM32H533 /RCC /RCC_APB3RSTR

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Interpret as RCC_APB3RSTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LPUART1RST 0 (B_0x0)I2C3RST 0 (B_0x0)I3C2RST 0 (B_0x0)LPTIM1RST 0 (B_0x0)LPTIM3RST 0 (B_0x0)LPTIM4RST 0 (B_0x0)LPTIM5RST 0 (B_0x0)LPTIM6RST 0 (B_0x0)VREFRST

VREFRST=B_0x0, LPTIM6RST=B_0x0, I3C2RST=B_0x0, LPTIM1RST=B_0x0, I2C3RST=B_0x0, LPUART1RST=B_0x0, LPTIM3RST=B_0x0, LPTIM5RST=B_0x0, LPTIM4RST=B_0x0

Description

RCC APB3 peripheral reset register

Fields

LPUART1RST

LPUART1 block reset

0 (B_0x0): does not reset the LPUART1 block (default after reset)

1 (B_0x1): resets the LPUART1 block

I2C3RST

I2C3 block reset

0 (B_0x0): does not reset the I2C3 block (default after reset)

1 (B_0x1): resets the I2C3 block

I3C2RST

I3C2 block reset

0 (B_0x0): does not reset the I3C2 block (default after reset)

1 (B_0x1): resets the I3C2 block

LPTIM1RST

LPTIM1 block reset

0 (B_0x0): does not reset the LPTIM1 block (default after reset)

1 (B_0x1): resets the LPTIM1 block

LPTIM3RST

LPTIM3 block reset

0 (B_0x0): does not reset the LPTIM3 block (default after reset)

1 (B_0x1): resets the LPTIM3 block

LPTIM4RST

LPTIM4 block reset

0 (B_0x0): does not reset the LPTIM4 block (default after reset)

1 (B_0x1): resets the LPTIM4 block

LPTIM5RST

LPTIM5 block reset

0 (B_0x0): does not reset the LPTIM5 block (default after reset)

1 (B_0x1): resets the LPTIM5 block

LPTIM6RST

LPTIM6 block reset

0 (B_0x0): does not reset the LPTIM6 block (default after reset)

1 (B_0x1): resets the LPTIM6 block

VREFRST

VREFBUF block reset

0 (B_0x0): does not reset the VREFBUF block (default after reset)

1 (B_0x1): resets the VREFBUF block

Links

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