stm32 /stm32h5 /STM32H533 /RCC /RCC_CFGR1

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Interpret as RCC_CFGR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SW0SWS0 (STOPWUCK)STOPWUCK 0 (B_0x0)STOPKERWUCK 0 (B_0x0)RTCPRE0 (B_0x0)TIMPRE 0 (B_0x0)MCO1PRE0 (B_0x0)MCO1SEL 0 (B_0x0)MCO2PRE0 (B_0x0)MCO2SEL

RTCPRE=B_0x0, STOPKERWUCK=B_0x0, MCO1PRE=B_0x0, MCO1SEL=B_0x0, MCO2SEL=B_0x0, TIMPRE=B_0x0, MCO2PRE=B_0x0, SW=B_0x0

Description

RCC clock configuration register1

Fields

SW

system clock and trace clock switch

0 (B_0x0): HSI selected as system clock (hsi_ck) (default after reset)

1 (B_0x1): CSI selected as system clock (csi_ck)

2 (B_0x2): HSE selected as system clock (hse_ck)

3 (B_0x3): PLL1 selected as system clock (pll1_p_ck for sys_ck)

SWS

system clock switch status

1 (B_0x1): CSI used as system clock (csi_ck)

2 (B_0x2): HSE used as system clock (hse_ck)

3 (B_0x3): PLL1 used as system clock (pll1_p_ck)

STOPWUCK

system clock selection after a wakeup from system Stop

1 (B_0x1): CSI selected as wakeup clock from system Stop

STOPKERWUCK

kernel clock selection after a wakeup from system Stop

0 (B_0x0): HSI selected as wakeup clock from system Stop (default after reset)

1 (B_0x1): CSI selected as wakeup clock from system Stop

RTCPRE

HSE division factor for RTC clock

0 (B_0x0): no clock (default after reset)

1 (B_0x1): no clock

2 (B_0x2): HSE/2

3 (B_0x3): HSE/3

4 (B_0x4): HSE/4

62 (B_0x3E): HSE/62

63 (B_0x3F): HSE/63

TIMPRE

timers clocks prescaler selection

0 (B_0x0): The timers kernel clock is equal to rcc_hclk1 if PPRE1 or PPRE2 corresponds to a division by 1 or 2, else it is equal to 2 x Fless thansub>rcc_pclk1less than/sub> or 2 x Fless thansub>rcc_pclk2less than/sub> (default after reset)

1 (B_0x1): The timers kernel clock is equal to 2 x Fless thansub>rcc_pclk1less than/sub> or 2 x Fless thansub>rcc_pclk2less than/sub> if PPRE1 or PPRE2 corresponds to a division by 1, 2 or 4, else it is equal to 4 x Fless thansub>rcc_pclk1less than/sub> or 4 x Fless thansub>rcc_pclk2less than/sub>

MCO1PRE

MCO1 prescaler

0 (B_0x0): prescaler disabled (default after reset)

1 (B_0x1): division by 1 (bypass)

2 (B_0x2): division by 2

3 (B_0x3): division by 3

4 (B_0x4): division by 4

15 (B_0xF): division by 15

MCO1SEL

Microcontroller clock output 1

0 (B_0x0): HSI clock selected (hsi_ck) (default after reset)

1 (B_0x1): LSE oscillator clock selected (lse_ck)

2 (B_0x2): HSE clock selected (hse_ck)

3 (B_0x3): PLL1 clock selected (pll1_q_ck)

4 (B_0x4): HSI48 clock selected (hsi48_ck)

MCO2PRE

MCO2 prescaler

0 (B_0x0): prescaler disabled (default after reset)

1 (B_0x1): division by 1 (bypass)

2 (B_0x2): division by 2

3 (B_0x3): division by 3

4 (B_0x4): division by 4

15 (B_0xF): division by 15

MCO2SEL

microcontroller clock output 2

0 (B_0x0): system clock selected (sys_ck) (default after reset)

1 (B_0x1): PLL2 oscillator clock selected (pll2_p_ck)

2 (B_0x2): HSE clock selected (hse_ck)

3 (B_0x3): PLL1 clock selected (pll1_p_ck)

4 (B_0x4): CSI clock selected (csi_ck)

5 (B_0x5): LSI clock selected (lsi_ck)

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