stm32 /stm32h5 /STM32H533 /TIM6 /TIM6_CR2

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Interpret as TIM6_CR2

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)MMS

MMS=B_0x0

Description

TIM6 control register 2

Fields

MMS

Master mode selection

0 (B_0x0): Reset - the UG bit from the TIMx_EGR register is used as a trigger output (tim_trgo).

1 (B_0x1): Enable - the Counter enable signal, tim_cnt_en, is used as a trigger output (tim_trgo).

2 (B_0x2): Update - The update event is selected as a trigger output (tim_trgo).

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