MMS2=B_0x0, CCDS=B_0x0, TI1S=B_0x0, CCPC=B_0x0, OIS1N=B_0x0, MMS=B_0x0, OIS1=B_0x0, CCUS=B_0x0
TIM8 control register 2
| CCPC | Capture/compare preloaded control 0 (B_0x0): CCxE, CCxNE and OCxM bits are not preloaded 1 (B_0x1): CCxE, CCxNE and OCxM bits are preloaded, after having been written, they are updated only when a commutation event (COM) occurs (COMG bit set or rising edge detected on tim_trgi, depending on the CCUS bit). |
| CCUS | Capture/compare control update selection 0 (B_0x0): When capture/compare control bits are preloaded (CCPC=1), they are updated by setting the COMG bit only 1 (B_0x1): When capture/compare control bits are preloaded (CCPC=1), they are updated by setting the COMG bit or when an rising edge occurs on tim_trgi |
| CCDS | Capture/compare DMA selection 0 (B_0x0): CCx DMA request sent when CCx event occurs 1 (B_0x1): CCx DMA requests sent when update event occurs |
| MMS | MMS[2:0]: Master mode selection 0 (B_0x0): Reset - the UG bit from the TIMx_EGR register is used as trigger output (tim_trgo). 1 (B_0x1): Enable - the Counter Enable signal CNT_EN is used as trigger output (tim_trgo). 2 (B_0x2): Update - The update event is selected as trigger output (tim_trgo). 3 (B_0x3): Compare Pulse - The trigger output send a positive pulse when the CC1IF flag is to be set (even if it was already high), as soon as a capture or a compare match occurred. 4 (B_0x4): Compare - tim_oc1refc signal is used as trigger output (tim_trgo) 5 (B_0x5): Compare - tim_oc2refc signal is used as trigger output (tim_trgo) 6 (B_0x6): Compare - tim_oc3refc signal is used as trigger output (tim_trgo) 7 (B_0x7): Compare - tim_oc4refc signal is used as trigger output (tim_trgo) |
| TI1S | tim_ti1 selection 0 (B_0x0): The tim_ti1_in[15:0] multiplexer output is connected to tim_ti1 input 1 (B_0x1): tim_ti1_in[15:0], tim_ti2_in[15:0] and tim_ti3_in[15:0] multiplexers outputs are XORed and connected to the tim_ti1 input |
| OIS1 | Output idle state 1 (tim_oc1 output) 0 (B_0x0): tim_oc1=0 (after a dead-time) when MOE=0 1 (B_0x1): tim_oc1=1 (after a dead-time) when MOE=0 |
| OIS1N | Output idle state 1 (tim_oc1n output) 0 (B_0x0): tim_oc1n=0 after a dead-time when MOE=0 1 (B_0x1): tim_oc1n=1 after a dead-time when MOE=0 |
| OIS2 | Output idle state 2 (tim_oc2 output) |
| OIS2N | Output idle state 2 (tim_oc2n output) |
| OIS3 | Output idle state 3 (tim_oc3n output) |
| OIS3N | Output idle state 3 (tim_oc3n output) |
| OIS4 | Output idle state 4 (tim_oc4 output) |
| OIS4N | Output idle state 4 (tim_oc4n output) |
| OIS5 | Output idle state 5 (tim_oc5 output) |
| OIS6 | Output idle state 6 (tim_oc6 output) |
| MMS2 | Master mode selection 2 0 (B_0x0): Reset - the UG bit from the TIMx_EGR register is used as trigger output (tim_trgo2). 1 (B_0x1): Enable - the Counter Enable signal CNT_EN is used as trigger output (tim_trgo2). 2 (B_0x2): Update - the update event is selected as trigger output (tim_trgo2). 3 (B_0x3): Compare pulse - the trigger output sends a positive pulse when the CC1IF flag is to be set (even if it was already high), as soon as a capture or compare match occurs (tim_trgo2). 4 (B_0x4): Compare - tim_oc1refc signal is used as trigger output (tim_trgo2) 5 (B_0x5): Compare - tim_oc2refc signal is used as trigger output (tim_trgo2) 6 (B_0x6): Compare - tim_oc3refc signal is used as trigger output (tim_trgo2) 7 (B_0x7): Compare - tim_oc4refc signal is used as trigger output (tim_trgo2) 8 (B_0x8): Compare - tim_oc5refc signal is used as trigger output (tim_trgo2) 9 (B_0x9): Compare - tim_oc6refc signal is used as trigger output (tim_trgo2) 10 (B_0xA): Compare Pulse - tim_oc4refc rising or falling edges generate pulses on tim_trgo2 11 (B_0xB): Compare pulse - tim_oc6refc rising or falling edges generate pulses on tim_trgo2 12 (B_0xC): Compare pulse - tim_oc4refc or tim_oc6refc rising edges generate pulses on tim_trgo2 13 (B_0xD): Compare pulse - tim_oc4refc rising or tim_oc6refc falling edges generate pulses on tim_trgo2 14 (B_0xE): Compare pulse - tim_oc5refc or tim_oc6refc rising edges generate pulses on tim_trgo2 15 (B_0xF): Compare pulse - tim_oc5refc rising or tim_oc6refc falling edges generate pulses on tim_trgo2 |
| MMS_1 | MMS[3] |