stm32 /stm32h5 /STM32H533 /USART /USART_CR3_ALTERNATE1

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Interpret as USART_CR3_ALTERNATE1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)EIE 0 (B_0x0)IREN 0 (B_0x0)IRLP 0 (B_0x0)HDSEL 0 (B_0x0)NACK 0 (B_0x0)SCEN 0 (B_0x0)DMAR 0 (B_0x0)DMAT 0 (B_0x0)RTSE 0 (B_0x0)CTSE 0 (B_0x0)CTSIE 0 (B_0x0)ONEBIT 0 (B_0x0)OVRDIS 0 (B_0x0)DDRE 0 (B_0x0)DEM 0 (B_0x0)DEP 0 (B_0x0)SCARCNT 0 (B_0x0)WUS0 0 (B_0x0)WUS1 0 (B_0x0)WUFIE 0 (B_0x0)TCBGTIE

WUS1=B_0x0, SCARCNT=B_0x0, OVRDIS=B_0x0, RTSE=B_0x0, DMAT=B_0x0, IREN=B_0x0, CTSE=B_0x0, DMAR=B_0x0, NACK=B_0x0, EIE=B_0x0, IRLP=B_0x0, SCEN=B_0x0, TCBGTIE=B_0x0, WUS0=B_0x0, DEM=B_0x0, WUFIE=B_0x0, DEP=B_0x0, HDSEL=B_0x0, DDRE=B_0x0, ONEBIT=B_0x0, CTSIE=B_0x0

Description

USART control register 3

Fields

EIE

Error interrupt enable

0 (B_0x0): Interrupt inhibited

1 (B_0x1): interrupt generated when FE=1 or ORE=1 or NE=1 or UDR = 1 (in SPI slave mode) in the USART_ISR register.

IREN

IrDA mode enable

0 (B_0x0): IrDA disabled

1 (B_0x1): IrDA enabled

IRLP

IrDA low-power

0 (B_0x0): Normal mode

1 (B_0x1): Low-power mode

HDSEL

Half-duplex selection

0 (B_0x0): Half-duplex mode is not selected

1 (B_0x1): Half-duplex mode is selected

NACK

Smartcard NACK enable

0 (B_0x0): NACK transmission in case of parity error is disabled

1 (B_0x1): NACK transmission during parity error is enabled

SCEN

Smartcard mode enable

0 (B_0x0): Smartcard mode disabled

1 (B_0x1): Smartcard mode enabled

DMAR

DMA enable receiver

0 (B_0x0): DMA mode is disabled for reception

1 (B_0x1): DMA mode is enabled for reception

DMAT

DMA enable transmitter

0 (B_0x0): DMA mode is disabled for transmission

1 (B_0x1): DMA mode is enabled for transmission

RTSE

RTS enable

0 (B_0x0): RTS hardware flow control disabled

1 (B_0x1): RTS output enabled, data is only requested when there is space in the receive buffer.

CTSE

CTS enable

0 (B_0x0): CTS hardware flow control disabled

1 (B_0x1): CTS mode enabled, data is only transmitted when the CTS input is deasserted (tied to 0).

CTSIE

CTS interrupt enable

0 (B_0x0): Interrupt is inhibited

1 (B_0x1): An interrupt is generated whenever CTSIF=1 in the USART_ISR register

ONEBIT

One sample bit method enable

0 (B_0x0): Three sample bit method

1 (B_0x1): One sample bit method

OVRDIS

Overrun Disable

0 (B_0x0): Overrun Error Flag, ORE, is set when received data is not read before receiving new data.

1 (B_0x1): Overrun functionality is disabled.

DDRE

DMA Disable on reception Error

0 (B_0x0): DMA is not disabled in case of reception error.

1 (B_0x1): DMA is disabled following a reception error.

DEM

Driver enable mode

0 (B_0x0): DE function is disabled.

1 (B_0x1): DE function is enabled.

DEP

Driver enable polarity selection

0 (B_0x0): DE signal is active high.

1 (B_0x1): DE signal is active low.

SCARCNT

Smartcard auto-retry count

0 (B_0x0): retransmission disabled - No automatic retransmission in transmission mode.

WUS0

Wake-up from low-power mode interrupt flag selection

0 (B_0x0): WUF active on address match (as defined by ADD[7:0] and ADDM7)

WUS1

Wake-up from low-power mode interrupt flag selection

0 (B_0x0): WUF active on address match (as defined by ADD[7:0] and ADDM7)

WUFIE

Wake-up from low-power mode interrupt enable

0 (B_0x0): Interrupt inhibited

1 (B_0x1): USART interrupt generated whenever WUF=1 in the USART_ISR register

TCBGTIE

Transmission Complete before guard time, interrupt enable

0 (B_0x0): Interrupt inhibited

1 (B_0x1): USART interrupt generated whenever TCBGT=1 in the USART_ISR register

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