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stm32 /stm32h5 /STM32H563 /ADC1 /ADC_TR1

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Interpret as ADC_TR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LT10 (B_0x0)AWDFILT 0HT1

AWDFILT=B_0x0

Description

ADC watchdog threshold register 1

Fields

LT1

Analog watchdog 1 lower threshold
AWDFILT

Analog watchdog filtering parameter

0 (B_0x0): No filtering

1 (B_0x1): two consecutive detection generates an AWDx flag or an interrupt

7 (B_0x7): Eight consecutive detection generates an AWDx flag or an interrupt
HT1

Analog watchdog 1 higher threshold

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32