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stm32 /stm32h5 /STM32H563 /GTZC1_TZSC /GTZC1_TZSC_MPCWM3BR

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Interpret as GTZC1_TZSC_MPCWM3BR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SUBB_START0SUBB_LENGTH

Description

GTZC1 TZSC memory 3 sub-region B watermark register

Fields

SUBB_START

Start of sub-region B in region x This field defines the address offset of the sub-region B, to be multiplied by the granularity defined in Table30, versus the start of the region x. External memories that are watermark controlled, start fully non-secure at reset when TZEN=0xC3. When TZEN=0xB4, external memories start fully secure (inverted reset value).
SUBB_LENGTH

Length of sub-region B in region x This field defines the length of the sub-region B, to be multiplied by the granularity defined in Table30. When SUBB_START + SUBB_LENGTH is higher than the maximum size allowed for the memory, a saturation of SUBB_LENGTH is applied automatically. If SUBB_LENGTH = 0, the sub-region B is disabled.(SREN bit in GTZC1_TZSC_MPCMWxBCFGR is cleared).

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32