ADC12EN=B_0x0, GPIOHEN=B_0x0, GPIOAEN=B_0x0, SRAM2EN=B_0x0, GPIODEN=B_0x0, GPIOBEN=B_0x0, RNGEN=B_0x0, SRAM3EN=B_0x0, HASHEN=B_0x0, DAC12EN=B_0x0, GPIOFEN=B_0x0, DCMI_PSSIEN=B_0x0, GPIOGEN=B_0x0, GPIOEEN=B_0x0, GPIOIEN=B_0x0, GPIOCEN=B_0x0
RCC AHB2 peripheral clock register
| GPIOAEN | GPIOA clock enable Set and reset by software. 0 (B_0x0): GPIOA peripheral clock disabled (default after reset) 1 (B_0x1): GPIOA peripheral clock enabled |
| GPIOBEN | GPIOB clock enable Set and reset by software. 0 (B_0x0): GPIOB peripheral clock disabled (default after reset) 1 (B_0x1): GPIOB peripheral clock enabled |
| GPIOCEN | GPIOC clock enable Set and reset by software. 0 (B_0x0): GPIOC peripheral clock disabled (default after reset) 1 (B_0x1): GPIOC peripheral clock enabled |
| GPIODEN | GPIOD clock enable Set and reset by software. 0 (B_0x0): GPIOD peripheral clock disabled (default after reset) 1 (B_0x1): GPIOD peripheral clock enabled |
| GPIOEEN | GPIOE clock enable Set and reset by software. 0 (B_0x0): GPIOE peripheral clock disabled (default after reset) 1 (B_0x1): GPIOE peripheral clock enabled |
| GPIOFEN | GPIOF clock enable Set and reset by software. 0 (B_0x0): GPIOF peripheral clock disabled (default after reset) 1 (B_0x1): GPIOF peripheral clock enabled |
| GPIOGEN | GPIOG clock enable Set and reset by software. 0 (B_0x0): GPIOG peripheral clock disabled (default after reset) 1 (B_0x1): GPIOG peripheral clock enabled |
| GPIOHEN | GPIOH clock enable Set and reset by software. 0 (B_0x0): GPIOH peripheral clock disabled (default after reset) 1 (B_0x1): GPIOH peripheral clock enabled |
| GPIOIEN | GPIOI clock enable Set and reset by software. 0 (B_0x0): GPIOI peripheral clock disabled (default after reset) 1 (B_0x1): GPIOI peripheral clock enabled |
| ADC12EN | ADC1 and 2 peripherals clock enabled Set and reset by software. 0 (B_0x0): ADC1 and 2 peripherals clock disabled (default after reset) 1 (B_0x1): ADC1 and 2 peripherals clock enabled |
| DAC12EN | DAC clock enable Set and reset by software. 0 (B_0x0): DAC peripheral clock disabled (default after reset) 1 (B_0x1): DAC peripheral clock enabled |
| DCMI_PSSIEN | digital camera interface clock enable (DCMI or PSSI depending which interface is active) Set and reset by software. 0 (B_0x0): DCMI/PSSI peripheral clock disabled (default after reset) 1 (B_0x1): DCMI/PSSI peripheral clock enabled |
| HASHEN | HASH clock enable Set and reset by software. 0 (B_0x0): HASH peripheral clock disabled (default after reset) 1 (B_0x1): HASH peripheral clock enabled |
| RNGEN | RNG clock enable Set and reset by software. 0 (B_0x0): RNG peripheral clock disabled (default after reset) 1 (B_0x1): RNG peripheral clock enabled |
| SRAM3EN | SRAM3 clock enable Set and reset by software. 0 (B_0x0): SRAM3 clock disabled 1 (B_0x1): SRAM3 clock enabled (default after reset) |
| SRAM2EN | SRAM2 clock enable Set and reset by software. 0 (B_0x0): SRAM2 clock disabled 1 (B_0x1): SRAM2 clock enabled (default after reset) |