MICNBR=B_0x0, PDMEN=B_0x0, CKEN1=B_0x0, CKEN2=B_0x0
SAI PDM control register
| PDMEN | PDM enable This bit is set and cleared by software. This bit allows to control the state of the PDM interface block. Make sure that the SAI in already operating in TDM master mode before enabling the PDM interface. 0 (B_0x0): PDM interface disabled 1 (B_0x1): PDM interface enabled |
| MICNBR | Number of microphones This bit is set and cleared by software. Note: It is not recommended to configure this field when PDMEN = 1.* The complete set of data lines might not be available for all SAI instances. Refer to for details. 0 (B_0x0): Configuration with 2 microphones 1 (B_0x1): Configuration with 4 microphones 2 (B_0x2): Configuration with 6 microphones 3 (B_0x3): Configuration with 8 microphones |
| CKEN1 | Clock enable of bitstream clock number 1 This bit is set and cleared by software. Note: It is not recommended to configure this bit when PDMEN = 1. SAI_CK1 might not be available for all SAI instances. Refer to implementation for details. 0 (B_0x0): SAI_CK1 clock disabled 1 (B_0x1): SAI_CK1 clock enabled |
| CKEN2 | Clock enable of bitstream clock number 2 This bit is set and cleared by software. Note: It is not recommended to configure this bit when PDMEN = 1. SAI_CK2 might not be available for all SAI instances. Refer to implementation for details. 0 (B_0x0): SAI_CK2 clock disabled 1 (B_0x1): SAI_CK2 clock enabled |