RegViz: Visualize DBGMCU_APB1LFZR Bitfield

stm32 /stm32h5 /STM32H573 /DBGMCU /DBGMCU_APB1LFZR

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Interpret as DBGMCU_APB1LFZR

DBG_TIM2_STOP=B_0x0, DBG_I3C1_STOP=B_0x0, DBG_IWDG_STOP=B_0x0, DBG_TIM6_STOP=B_0x0, DBG_TIM14_STOP=B_0x0, DBG_WWDG_STOP=B_0x0, DBG_TIM7_STOP=B_0x0, DBG_TIM12_STOP=B_0x0, DBG_TIM5_STOP=B_0x0, DBG_TIM13_STOP=B_0x0, DBG_I2C1_STOP=B_0x0, DBG_TIM4_STOP=B_0x0, DBG_TIM3_STOP=B_0x0, DBG_I2C2_STOP=B_0x0

Description

DBGMCU APB1L peripheral freeze register

Fields

DBG_TIM2_STOP	TIM2 stop in debug 0 (B_0x0): normal operation. TIM2 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM2 is frozen while CPU is in debug mode.
DBG_TIM3_STOP	TIM3 stop in debug 0 (B_0x0): normal operation. TIM3 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM3 is frozen while CPU is in debug mode.
DBG_TIM4_STOP	TIM4 stop in debug 0 (B_0x0): normal operation. TIM4 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM4 is frozen while CPU is in debug mode.
DBG_TIM5_STOP	TIM5 stop in debug 0 (B_0x0): normal operation. TIM5 continues to operate while CPU is in debug mode. 1 (B_0x1): Stop in debug. TIM5 is frozen while CPU is in debug mode.
DBG_TIM6_STOP	TIM6 stop in debug 0 (B_0x0): normal operation. TIM6 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM6 is frozen while CPU is in debug mode.
DBG_TIM7_STOP	TIM7 stop in debug 0 (B_0x0): normal operation. TIM7 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM7 is frozen while CPU is in debug mode.
DBG_TIM12_STOP	TIM12 stop in debug 0 (B_0x0): normal operation. TIM12 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM12 is frozen while CPU is in debug mode.
DBG_TIM13_STOP	TIM13 stop in debug 0 (B_0x0): normal operation. TIM13 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM13 is frozen while CPU is in debug mode.
DBG_TIM14_STOP	TIM14 stop in debug 0 (B_0x0): normal operation. TIM14 continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. TIM14 is frozen while CPU is in debug mode.
DBG_WWDG_STOP	WWDG stop in debug 0 (B_0x0): normal operation. WWDG continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. WWDG is frozen while CPU is in debug mode.
DBG_IWDG_STOP	IWDG stop in debug 0 (B_0x0): normal operation. IWDG continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. IWDG is frozen while CPU is in debug mode.
DBG_I2C1_STOP	I2C1 SMBUS timeout stop in debug 0 (B_0x0): normal operation. I2C1 SMBUS timeout continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. I2C1 SMBUS timeout is frozen while CPU is in debug mode.
DBG_I2C2_STOP	I2C2 SMBUS timeout stop in debug 0 (B_0x0): normal operation. I2C2 SMBUS timeout continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. I2C2 SMBUS timeout is frozen while CPU is in debug mode.
DBG_I3C1_STOP	I3C1 SCL stall counter stop in debug 0 (B_0x0): normal operation. I3C1 SCL stall timeout counter continues to operate while CPU is in debug mode. 1 (B_0x1): stop in debug. I3C1 SCL stall timeout counter is frozen while CPU is in debug mode.

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