stm32 /stm32h5 /STM32H573 /ETH /ETH_MTLRXQMPOCR

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Interpret as ETH_MTLRXQMPOCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OVFPKTCNT0 (OVFCNTOVF)OVFCNTOVF 0MISPKTCNT0 (MISCNTOVF)MISCNTOVF

Description

Rx queue missed packet and overflow counter register

Fields

OVFPKTCNT

Overflow Packet Counter This field indicates the number of packets discarded by the Ethernet peripheral because of Receive queue overflow. This counter is incremented each time the Ethernet peripheral discards an incoming packet because of overflow. This counter is reset when this register is read.

OVFCNTOVF

Overflow Counter Overflow Bit When set, this bit indicates that the Rx Queue Overflow Packet Counter field crossed the maximum limit.

MISPKTCNT

Missed Packet Counter This field indicates the number of packets missed by the Ethernet peripheral because the application requested to flush the packets for this queue. This counter is reset when this register is read. This counter is incremented by 1 when the DMA discards the packet because of buffer unavailability.

MISCNTOVF

Missed Packet Counter Overflow Bit When set, this bit indicates that the Rx Queue Missed Packet Counter crossed the maximum limit.

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