stm32 /stm32h5 /STM32H573 /EXTI /EXTI_EXTICR1

EXTI0 GPIO port selection These bits are written by software to select the source input for EXTI0 external interrupt. When EXTI_SECCFGR1.SEC0 is disabled, EXTI0 can be accessed with non-secure and secure access. When EXTI_SECCFGR1.SEC0 is enabled, EXTI0 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR1.PRIV0 is disabled, EXTI0 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR1.PRIV0 is enabled, EXTI0 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA0 pin

1 (B_0x01): PB0 pin

2 (B_0x02): PC0 pin

3 (B_0x03): PD0 pin

4 (B_0x04): PE0 pin

5 (B_0x05): PF0 pin

6 (B_0x06): PG0 pin

7 (B_0x07): PH0 pin

8 (B_0x08): PI0 pin

EXTI1 GPIO port selection These bits are written by software to select the source input for EXTI1 external interrupt. When EXTI_SECCFGR1.SEC1 is disabled, EXTI1 can be accessed with non-secure and secure access. When EXTI_SECCFGR1.SEC1 is enabled, EXTI1 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR1.PRIV1 is disabled, EXTI1 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR1.PRIV1 is enabled, EXTI1 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA1 pin

1 (B_0x01): PB1 pin

2 (B_0x02): PC1 pin

3 (B_0x03): PD1 pin

4 (B_0x04): PE1 pin

5 (B_0x05): PF1 pin

6 (B_0x06): PG1 pin

7 (B_0x07): PH1 pin

8 (B_0x08): PI1 pin

EXTI2 GPIO port selection These bits are written by software to select the source input for EXTI2 external interrupt. When EXTI_SECCFGR1.SEC2 is disabled, EXTI2 can be accessed with non-secure and secure access. When EXTI_SECCFGR1.SEC2 is enabled, EXTI2 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR1.PRIV2 is disabled, EXTI2 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR1.PRIV2 is enabled, EXTI2 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA2 pin

1 (B_0x01): PB2 pin

2 (B_0x02): PC2 pin

3 (B_0x03): PD2 pin

4 (B_0x04): PE2 pin

5 (B_0x05): PF2 pin

6 (B_0x06): PG2 pin

7 (B_0x07): PH2 pin

8 (B_0x08): PI2 pin

EXTI3 GPIO port selection These bits are written by software to select the source input for EXTI3 external interrupt. When EXTI_SECCFGR1.SEC3 is disabled, EXTI3 can be accessed with non-secure and secure access. When EXTI_SECCFGR1.SEC3 is enabled, EXTI3 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR1.PRIV3 is disabled, EXTI3 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR1.PRIV3 is enabled, EXTI3 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA3 pin

1 (B_0x01): PB3 pin

2 (B_0x02): PC3 pin

3 (B_0x03): PD3 pin

4 (B_0x04): PE3 pin

5 (B_0x05): PF3 pin

6 (B_0x06): PG3 pin

7 (B_0x07): PH3 pin

8 (B_0x08): PI3 pin