EXTI13=B_0x0, EXTI12=B_0x0, EXTI15=B_0x0, EXTI14=B_0x0
EXTI external interrupt selection register
EXTI12 | EXTI12 GPIO port selection These bits are written by software to select the source input for EXTI12 external interrupt. When EXTI_PRIVCFGR.PRIV12 is disabled, EXTI12 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV12 is enabled, EXTI12 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[12] pin 1 (B_0x1): PB[12] pin 2 (B_0x2): PC[12] pin |
EXTI13 | EXTI13 GPIO port selection These bits are written by software to select the source input for EXTI13 external interrupt. When EXTI_PRIVCFGR.PRIV13 is disabled, EXTI13 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV13 is enabled, EXTI13 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[13] pin 1 (B_0x1): PB[13] pin 2 (B_0x2): PC[13] pin |
EXTI14 | EXTI14 GPIO port selection These bits are written by software to select the source input for EXTI14 external interrupt. When EXTI_PRIVCFGR.PRIV14 is disabled, EXTI14 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV14 is enabled, EXTI14 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[14] pin 1 (B_0x1): PB[14] pin 2 (B_0x2): PC[14] pin |
EXTI15 | EXTI15 GPIO port selection These bits are written by software to select the source input for EXTI15 external interrupt. When EXTI_PRIVCFGR.PRIV15 is disabled, EXTI15 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV15 is enabled, EXTI15 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[15] pin 1 (B_0x1): PB[15] pin 2 (B_0x2): PC[15] pin |