stm32 /stm32h5 /STM32H573 /FMAC /FMAC_SR

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Interpret as FMAC_SR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)YEMPTY 0 (B_0x0)X1FULL 0 (B_0x0)OVFL 0 (B_0x0)UNFL 0 (B_0x0)SAT

SAT=B_0x0, X1FULL=B_0x0, YEMPTY=B_0x0, UNFL=B_0x0, OVFL=B_0x0

Description

FMAC status register

Fields

YEMPTY

Y buffer empty flag The buffer is flagged as empty if the number of unread data is less than the EMPTY_WM threshold. The number of unread data is the difference between the read pointer and the current output destination address. This flag is set and cleared by hardware, or by a reset. Note: after the last sample is read from the Y buffer there is a delay of 3 clock cycles before the YEMPTY flag goes high. To avoid any risk of underflow it is recommended to insert a software delay after reading from the Y buffer before reading the FMAC_SR. Alternatively, an EMPTY_WM threshold of 2 can be used.

0 (B_0x0): Y buffer not empty. If the RIEN bit is set, the interrupt request is asserted until the flag is set. If DMAREN is set, DMA read channel requests are generated until the flag is set.

1 (B_0x1): Y buffer empty.

X1FULL

X1 buffer full flag The buffer is flagged as full if the number of available spaces is less than the FULL_WM threshold. The number of available spaces is the difference between the write pointer and the least recent sample currently in use. This flag is set and cleared by hardware, or by a reset. Note: after the last available space in the X1 buffer is filled there is a delay of 3 clock cycles before the X1FULL flag goes high. To avoid any risk of overflow it is recommended to insert a software delay after writing to the X1 buffer before reading the FMAC_SR. Alternatively, a FULL_WM threshold of 2 can be used.

0 (B_0x0): X1 buffer not full. If the WIEN bit is set, the interrupt request is asserted until the flag is set. If DMAWEN is set, DMA write channel requests are generated until the flag is set.

1 (B_0x1): X1 buffer full.

OVFL

Overflow error flag An overflow occurs when a write is made to FMAC_WDATA when no free space is available in the X1 buffer. This flag is cleared by a reset of the unit.

0 (B_0x0): No overflow detected

1 (B_0x1): Overflow detected. If the OVFLIEN bit is set, an interrupt is generated.

UNFL

Underflow error flag An underflow occurs when a read is made from FMAC_RDATA when no valid data is available in the Y buffer. This flag is cleared by a reset of the unit.

0 (B_0x0): No underflow detected

1 (B_0x1): Underflow detected. If the UNFLIEN bit is set, an interrupt is generated.

SAT

Saturation error flag Saturation occurs when the result of an accumulation exceeds the numeric range of the accumulator. This flag is cleared by a reset of the unit.

0 (B_0x0): No saturation detected

1 (B_0x1): Saturation detected. If the SATIEN bit is set, an interrupt is generated.

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