PWR_DBPCR

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Interpret as PWR_DBPCR

DBP=B_0x0

Description

PWR Backup domain control register

Fields

DBP

Disable Backup domain write protection In reset state, all registers and SRAM in Backup domain are protected against parasitic write access. This bit must be set to enable write access to these registers.

0 (B_0x0): Write access to Backup domain disabled

1 (B_0x1): Write access to Backup domain enabled

Links

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