stm32 /stm32h5 /STM32H573 /PWR /PWR_SECCFGR

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Interpret as PWR_SECCFGR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)WUP1SEC 0 (B_0x0)WUP2SEC 0 (B_0x0)WUP3SEC 0 (B_0x0)WUP4SEC 0 (B_0x0)WUP5SEC 0 (B_0x0)WUP6SEC 0 (B_0x0)WUP7SEC 0 (B_0x0)WUP8SEC 0 (B_0x0)RETSEC 0 (B_0x0)LPMSEC 0 (B_0x0)SCMSEC 0 (B_0x0)VBSEC 0 (B_0x0)VUSBSEC

WUP5SEC=B_0x0, VBSEC=B_0x0, RETSEC=B_0x0, LPMSEC=B_0x0, WUP3SEC=B_0x0, SCMSEC=B_0x0, WUP2SEC=B_0x0, WUP1SEC=B_0x0, WUP6SEC=B_0x0, VUSBSEC=B_0x0, WUP8SEC=B_0x0, WUP7SEC=B_0x0, WUP4SEC=B_0x0

Description

PWR security configuration register

Fields

WUP1SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

WUP2SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

WUP3SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

WUP4SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

WUP5SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

WUP6SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

WUP7SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

WUP8SEC

WUPx secure protection

0 (B_0x0): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written with secure or non-secure access.

1 (B_0x1): The bits related to the WKUPx wakeup pin in PWR_WUSCR and PWR_WUCR can be read and written only with secure access.

RETSEC

retention secure protection

0 (B_0x0): PWR_IORETR can be read and written with secure or non-secure access.

1 (B_0x1): PWR_IORETR can be read and written only with secure access.

LPMSEC

low-power modes secure protection

0 (B_0x0): PWR_PMCR can be read and written with secure or non-secure access.

1 (B_0x1): PWR_PMCR can be read and written only with secure access.

SCMSEC

supply configuration and monitoring secure protection.

0 (B_0x0): PWR_SCCR and PWR_VMCR can be read and written with secure or non-secure access.

1 (B_0x1): PWR_SCCR and PWR_VMCR can be read and written only with secure access.

VBSEC

backup domain secure protection

0 (B_0x0): PWR_BDCR, PWR_DBPCR can be read and written with secure or non-secure access.

1 (B_0x1): PWR_BDCR, PWR_DBPCR can be read and written only with secure access.

VUSBSEC

voltage USB secure protection

0 (B_0x0): PWR_USBSCR can be read and written with secure or non-secure access.

1 (B_0x1): PWR_USBSCR can be read and written only with secure access…

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