SEIE=B_0x0, DEIE=B_0x0, ECCNMI=B_0x0
RAMCFG memory 2 interrupt enable register
| SEIE | ECC single error interrupt enable 0 (B_0x0): Single error interrupt disabled 1 (B_0x1): Single error interrupt enabled |
| DEIE | ECC double error interrupt enable 0 (B_0x0): Double error interrupt disabled 1 (B_0x1): Double error interrupt enabled |
| ECCNMI | Double error NMI This bit is set by software and cleared only by a global RAMCFG reset. Note: if ECCNMI is set, the RAMCFG maskable interrupt is not generated whatever DEIE bit value. 0 (B_0x0): NMI not generated in case of ECC double error 1 (B_0x1): NMI generated in case of ECC double error |