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stm32 /stm32h5 /STM32H573 /RCC /RCC_APB1LRSTR

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Interpret as RCC_APB1LRSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TIM2RST 0 (B_0x0)TIM3RST 0 (B_0x0)TIM4RST 0 (B_0x0)TIM5RST 0 (B_0x0)TIM6RST 0 (B_0x0)TIM7RST 0 (B_0x0)TIM12RST 0 (B_0x0)TIM13RST 0 (B_0x0)TIM14RST 0 (B_0x0)SPI2RST 0 (B_0x0)SPI3RST 0 (B_0x0)USART2RST 0 (B_0x0)USART3RST 0 (B_0x0)UART4RST 0 (B_0x0)UART5RST 0 (B_0x0)I2C1RST 0 (B_0x0)I2C2RST 0 (B_0x0)I3C1RST 0 (B_0x0)CRSRST 0 (B_0x0)USART6RST 0 (B_0x0)USART10RST 0 (B_0x0)USART11RST 0 (B_0x0)CECRST 0 (B_0x0)UART7RST 0 (B_0x0)UART8RST

USART3RST=B_0x0, UART4RST=B_0x0, UART5RST=B_0x0, USART2RST=B_0x0, UART7RST=B_0x0, TIM7RST=B_0x0, TIM6RST=B_0x0, TIM5RST=B_0x0, I2C2RST=B_0x0, TIM12RST=B_0x0, UART8RST=B_0x0, USART10RST=B_0x0, USART6RST=B_0x0, CRSRST=B_0x0, SPI2RST=B_0x0, SPI3RST=B_0x0, TIM4RST=B_0x0, I2C1RST=B_0x0, TIM14RST=B_0x0, CECRST=B_0x0, I3C1RST=B_0x0, TIM13RST=B_0x0, TIM3RST=B_0x0, TIM2RST=B_0x0, USART11RST=B_0x0

Description

RCC APB1 peripheral low reset register

Fields

TIM2RST

TIM2 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM2 block (default after reset)

1 (B_0x1): resets the TIM2 block
TIM3RST

TIM3 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM3 block (default after reset)

1 (B_0x1): resets the TIM3 block
TIM4RST

TIM4 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM4 block (default after reset)

1 (B_0x1): resets the TIM4 block
TIM5RST

TIM5 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM5 block (default after reset)

1 (B_0x1): resets the TIM5 block
TIM6RST

TIM6 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM6 block (default after reset)

1 (B_0x1): resets the TIM6 block
TIM7RST

TIM7 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM7 block (default after reset)

1 (B_0x1): resets the TIM7 block
TIM12RST

TIM12 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM12 block (default after reset)

1 (B_0x1): resets the TIM12 block
TIM13RST

TIM13 block reset t Set and reset by software.

0 (B_0x0): does not reset the TIM13 block (default after reset)

1 (B_0x1): resets the TIM13 block
TIM14RST

TIM14 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM14 block (default after reset)

1 (B_0x1): resets the TIM14 block
SPI2RST

SPI2 block reset Set and reset by software.

0 (B_0x0): does not reset the SPI2 block (default after reset)

1 (B_0x1): resets the SPI2 block
SPI3RST

SPI3 block reset Set and reset by software.

0 (B_0x0): does not reset the SPI3 block (default after reset)

1 (B_0x1): resets the SPI3 block
USART2RST

USART2 block reset Set and reset by software.

0 (B_0x0): does not reset the USART2 block (default after reset)

1 (B_0x1): resets the USART2 block
USART3RST

USART3 block reset Set and reset by software.

0 (B_0x0): does not reset the USART3 block (default after reset)

1 (B_0x1): resets the USART3 block
UART4RST

UART4 block reset Set and reset by software.

0 (B_0x0): does not reset the UART4 block (default after reset)

1 (B_0x1): resets the UART4 block
UART5RST

UART5 block reset Set and reset by software.

0 (B_0x0): does not reset the UART5 block (default after reset)

1 (B_0x1): resets the UART5 block
I2C1RST

I2C1 block reset Set and reset by software.

0 (B_0x0): does not reset the I2C1 block (default after reset)

1 (B_0x1): resets the I2C1 block
I2C2RST

I2C2 block reset Set and reset by software.

0 (B_0x0): does not reset the I2C2 block (default after reset)

1 (B_0x1): resets the I2C2 block
I3C1RST

I3C1 block reset Set and reset by software.

0 (B_0x0): does not reset the I3C1 block (default after reset)

1 (B_0x1): resets the I3C1 block
CRSRST

CRS block reset Set and reset by software.

0 (B_0x0): does not reset the CRS block (default after reset)

1 (B_0x1): resets the CRS block
USART6RST

USART6 block reset Set and reset by software.

0 (B_0x0): does not reset the USART6 block (default after reset)

1 (B_0x1): resets the USART6 block
USART10RST

USART10 block reset Set and reset by software.

0 (B_0x0): does not reset the USART10 block (default after reset)

1 (B_0x1): resets the USART10 block
USART11RST

USART11 block reset Set and reset by software.

0 (B_0x0): does not reset the USART11 block (default after reset)

1 (B_0x1): resets the USART11 block
CECRST

HDMI-CEC block reset Set and reset by software.

0 (B_0x0): does not reset the HDMI-CEC block (default after reset)

1 (B_0x1): resets the HDMI-CEC block
UART7RST

UART7 block reset Set and reset by software.

0 (B_0x0): does not reset the UART7 block (default after reset)

1 (B_0x1): resets the UART7 block
UART8RST

UART8 block reset Set and reset by software.

0 (B_0x0): does not reset the UART8 block (default after reset)

1 (B_0x1): resets the UART8 block

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32