Regviz

stm32 /stm32h5 /STM32H573 /RCC /RCC_APB2RSTR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_APB2RSTR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h5/STM32H562/RCC/RCC_APB2RSTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TIM1RST 0 (B_0x0)SPI1RST 0 (B_0x0)TIM8RST 0 (B_0x0)USART1RST 0 (B_0x0)TIM15RST 0 (B_0x0)TIM16RST 0 (B_0x0)TIM17RST 0 (B_0x0)SPI4RST 0 (B_0x0)SPI6RST 0 (B_0x0)SAI1RST 0 (B_0x0)SAI2RST 0 (B_0x0)USBFSRST

USBFSRST=B_0x0, SPI4RST=B_0x0, USART1RST=B_0x0, TIM8RST=B_0x0, SPI1RST=B_0x0, SPI6RST=B_0x0, TIM15RST=B_0x0, TIM17RST=B_0x0, SAI2RST=B_0x0, TIM16RST=B_0x0, TIM1RST=B_0x0, SAI1RST=B_0x0

Description

RCC APB2 peripheral reset register

Fields

TIM1RST

TIM1 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM1 block (default after reset)

1 (B_0x1): resets the TIM1 block
SPI1RST

SPI1 block reset Set and reset by software.

0 (B_0x0): does not reset the SPI1 block (default after reset)

1 (B_0x1): resets the SPI1 block
TIM8RST

TIM8 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM8 block (default after reset)

1 (B_0x1): resets the TIM8 block
USART1RST

USART1 block reset Set and reset by software.

0 (B_0x0): does not reset the USART1 block (default after reset)

1 (B_0x1): resets the USART1 block
TIM15RST

TIM15 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM15 block (default after reset)

1 (B_0x1): resets the TIM15 block
TIM16RST

TIM16 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM16 block (default after reset)

1 (B_0x1): resets the TIM16 block
TIM17RST

TIM17 block reset Set and reset by software.

0 (B_0x0): does not reset the TIM17 block (default after reset)

1 (B_0x1): resets the TIM17 block
SPI4RST

SPI4 block reset Set and reset by software.

0 (B_0x0): does not reset the SPI4 block (default after reset)

1 (B_0x1): resets the SPI4 block
SPI6RST

SPI6 block reset Set and reset by software.

0 (B_0x0): does not reset the SPI6 block (default after reset)

1 (B_0x1): resets the SPI6 block
SAI1RST

SAI1 block reset Set and reset by software.

0 (B_0x0): does not reset the SAI1 (default after reset)

1 (B_0x1): resets the SAI1
SAI2RST

SAI2 block reset Set and reset by software.

0 (B_0x0): does not reset the SAI2 block (default after reset)

1 (B_0x1): resets the SAI2 block
USBFSRST

USBFS block reset Set and reset by software.

0 (B_0x0): does not reset the USBFS block (default after reset)

1 (B_0x1): resets the USBFS block

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32