stm32 /stm32h5 /STM32H573 /RCC /RCC_CCIPR4

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Interpret as RCC_CCIPR4

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)OCTOSPI1SEL 0 (B_0x0)SYSTICKSEL 0 (B_0x0)USBFSSEL 0 (B_0x0)SDMMC1SEL 0 (B_0x0)SDMMC2SEL 0 (B_0x0)I2C1SEL 0 (B_0x0)I2C2SEL 0 (B_0x0)I2C3SEL 0 (B_0x0)I2C4SEL 0 (B_0x0)I3C1SEL

I2C2SEL=B_0x0, I3C1SEL=B_0x0, SDMMC2SEL=B_0x0, SDMMC1SEL=B_0x0, USBFSSEL=B_0x0, SYSTICKSEL=B_0x0, I2C4SEL=B_0x0, I2C1SEL=B_0x0, I2C3SEL=B_0x0, OCTOSPI1SEL=B_0x0

Description

RCC kernel clock configuration register

Fields

OCTOSPI1SEL

OCTOSPI1 kernel clock source selection Set and reset by software.

0 (B_0x0): rcc_hclk4 selected as kernel clock (default after reset)

1 (B_0x1): pll1_q_ck selected as kernel clock

2 (B_0x2): pll2_r_ck selected as kernel clock

3 (B_0x3): per_ck selected as kernel clock

SYSTICKSEL

SYSTICK clock source selection Note: rcc_hclk frequency must be four times higher than lsi_ker_ck/lse_ck (period (LSI/LSE) greater than or equal 4 * period (HCLK).

0 (B_0x0): rcc_hclk/8 selected as clock source (default after reset)

1 (B_0x1): lsi_ker_ck[1] selected as clock source

2 (B_0x2): lse_ck[1] selected as clock source

3 (B_0x3): reserved, the kernel clock is disabled

USBFSSEL

USBFS kernel clock source selection

0 (B_0x0): no clock is selected as kernel clock (default after reset)

1 (B_0x1): pll1_q_ck selected as kernel clock

2 (B_0x2): pll3_q_ck selected as kernel clock

3 (B_0x3): hsi48_ker_ck selected as kernel clock

SDMMC1SEL

SDMMC1 kernel clock source selection

0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset)

1 (B_0x1): pll2_r_ck selected as kernel clock

SDMMC2SEL

SDMMC2 kernel clock source selection

0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset)

1 (B_0x1): pll2_r_ck selected as kernel clock

I2C1SEL

I2C1 kernel clock source selection

0 (B_0x0): rcc_pclk1 selected as kernel clock (default after reset)

1 (B_0x1): pll3_r_ck selected as kernel clock

2 (B_0x2): hsi_ker_ck selected as kernel clock

3 (B_0x3): csi_ker_ck selected as kernel clock

I2C2SEL

I2C2 kernel clock source selection

0 (B_0x0): rcc_pclk1 selected as kernel clock (default after reset)

1 (B_0x1): pll3_r_ck selected as kernel clock

2 (B_0x2): hsi_ker_ck selected as kernel clock

3 (B_0x3): csi_ker_ck selected as kernel clock

I2C3SEL

I2C3 kernel clock source selection

0 (B_0x0): rcc_pclk3 selected as kernel clock (default after reset)

1 (B_0x1): pll3_r_ck selected as kernel clock

2 (B_0x2): hsi_ker_ck selected as kernel clock

3 (B_0x3): csi_ker_ck selected as kernel clock

I2C4SEL

I2C4 kernel clock source selection

0 (B_0x0): rcc_pclk3 selected as kernel clock (default after reset)

1 (B_0x1): pll3_r_ck selected as kernel clock

2 (B_0x2): hsi_ker_ck selected as kernel clock

3 (B_0x3): csi_ker_ck selected as kernel clock

I3C1SEL

I3C1 kernel clock source selection

0 (B_0x0): rcc_pclk3 selected as kernel clock (default after reset)

1 (B_0x1): pll3_r_ck selected as kernel clock

2 (B_0x2): hsi_ker_ck selected as kernel clock

3 (B_0x3): no clock selected

Links

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