stm32 /stm32h5 /STM32H573 /RTC /RTC_SMISR

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Interpret as RTC_SMISR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALRAMF)ALRAMF 0 (ALRBMF)ALRBMF 0 (WUTMF)WUTMF 0 (TSMF)TSMF 0 (TSOVMF)TSOVMF 0 (ITSMF)ITSMF 0 (SSRUMF)SSRUMF

Description

RTC secure masked interrupt status register

Fields

ALRAMF

Alarm A interrupt secure masked flag This flag is set by hardware when the alarm A secure interrupt occurs.

ALRBMF

Alarm B interrupt secure masked flag This flag is set by hardware when the alarm B secure interrupt occurs.

WUTMF

Wakeup timer interrupt secure masked flag This flag is set by hardware when the wakeup timer secure interrupt occurs. This flag must be cleared by software at least 1.5 RTCCLK periods before WUTF is set to 1 again.

TSMF

Timestamp interrupt secure masked flag This flag is set by hardware when a timestamp secure interrupt occurs. If ITSF flag is set, TSF must be cleared together with ITSF.

TSOVMF

Timestamp overflow interrupt secure masked flag This flag is set by hardware when a timestamp secure interrupt occurs while TSMF is already set. It is recommended to check and then clear TSOVF only after clearing the TSF bit. Otherwise, an overflow might not be noticed if a timestamp event occurs immediately before the TSF bit is cleared.

ITSMF

Internal timestamp interrupt secure masked flag This flag is set by hardware when a timestamp on the internal event occurs and timestamp secure interrupt is raised.

SSRUMF

SSR underflow secure masked flag This flag is set by hardware when the SSR underflow secure interrupt occurs.

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