OVSS=B_0x0, OSVR=B_0x0, RSHIFT1=B_0x0, ROVSM=B_0x0, JOVSE=B_0x0, ROVSE=B_0x0, TROVS=B_0x0, LSHIFT=B_0x0
ADC configuration register 2
| ROVSE | Regular Oversampling Enable This bit is set and cleared by software to enable regular oversampling. Note: The software is allowed to write this bit only when ADSTART=0 and JADSTART=0 (which ensures that no conversion is ongoing) 0 (B_0x0): Regular Oversampling disabled 1 (B_0x1): Regular Oversampling enabled |
| JOVSE | Injected Oversampling Enable This bit is set and cleared by software to enable injected oversampling. Note: The software is allowed to write this bit only when ADSTART=0 and JADSTART=0 (which ensures that no conversion is ongoing) 0 (B_0x0): Injected Oversampling disabled 1 (B_0x1): Injected Oversampling enabled |
| OVSS | Oversampling right shift This bitfield is set and cleared by software to define the right shifting applied to the raw oversampling result. Others: Reserved, must not be used. Note: The software is allowed to write these bits only when ADSTART=0 (which ensures that no conversion is ongoing). 0 (B_0x0): No right shift 1 (B_0x1): Shift right 1-bit 2 (B_0x2): Shift right 2-bits 3 (B_0x3): Shift right 3-bits 4 (B_0x4): Shift right 4-bits 5 (B_0x5): Shift right 5-bits 6 (B_0x6): Shift right 6-bits 7 (B_0x7): Shift right 7-bits 8 (B_0x8): Shift right 8-bits 9 (B_0x9): Shift right 9-bits 10 (B_0xA): Shift right 10-bits 11 (B_0xB): Shift right 11-bits |
| TROVS | Triggered Regular Oversampling This bit is set and cleared by software to enable triggered oversampling Note: The software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing). 0 (B_0x0): All oversampled conversions for a channel are done consecutively following a trigger 1 (B_0x1): Each oversampled conversion for a channel needs a new trigger |
| ROVSM | Regular Oversampling mode This bit is set and cleared by software to select the regular oversampling mode. Note: The software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing). 0 (B_0x0): Continued mode: When injected conversions are triggered, the oversampling is temporary stopped and continued after the injection sequence (oversampling buffer is maintained during injected sequence) 1 (B_0x1): Resumed mode: When injected conversions are triggered, the current oversampling is aborted and resumed from start after the injection sequence (oversampling buffer is zeroed by injected sequence start) |
| RSHIFT1 | Right-shift data after Offset 1 correction This bitfield is set and cleared by software to right-shift 1-bit data after offset1 correction. This bit can only be used for 8-bit and 16-bit data format (see (ADC_DR, ADC_JDRy, OFFSETy, OFFSETy_CH, OVSS, LSHIFT, RSHIFT, SSATE) for details). 0 (B_0x0): Right-shifting disabled 1 (B_0x1): Data is right-shifted 1-bit. |
| RSHIFT2 | Right-shift data after Offset 2 correction Refer to RSHIFT1 description |
| RSHIFT3 | Right-shift data after Offset 3 correction Refer to RSHIFT1 description |
| RSHIFT4 | Right-shift data after Offset 4 correction Refer to RSHIFT1 description. |
| OSVR | Oversampling ratio This bitfield is set and cleared by software to define the oversampling ratio. 2: 3x … 1023: 1024x Note: The software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing). 0 (B_0x0): 1x (no oversampling) 1 (B_0x1): 2x |
| LSHIFT | Left shift factor This bitfield is set and cleared by software to define the left shifting applied to the final result with or without oversampling. Note: The software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing). 0 (B_0x0): No left shift 1 (B_0x1): Shift left 1-bit 2 (B_0x2): Shift left 2-bits 3 (B_0x3): Shift left 3-bits 4 (B_0x4): Shift left 4-bits 5 (B_0x5): Shift left 5-bits 6 (B_0x6): Shift left 6-bits 7 (B_0x7): Shift left 7-bits 8 (B_0x8): Shift left 8-bits 9 (B_0x9): Shift left 9-bits 10 (B_0xA): Shift left 10-bits 11 (B_0xB): Shift left 11-bits 12 (B_0xC): Shift left 12-bits 13 (B_0xD): Shift left 13-bits 14 (B_0xE): Shift left 14-bits 15 (B_0xF): Shift left 15-bits |