Regviz

stm32 /stm32h7 /STM32H725 /OTG1_HS_HOST /OTG_HS_HCINT1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as OTG_HS_HCINT1

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f4/STM32F427/OTG_HS_HOST/OTG_HS_HCINT1#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XFRC)XFRC 0 (CHH)CHH 0 (AHBERR)AHBERR 0 (STALL)STALL 0 (NAK)NAK 0 (ACK)ACK 0 (NYET)NYET 0 (TXERR)TXERR 0 (BBERR)BBERR 0 (FRMOR)FRMOR 0 (DTERR)DTERR

Description

OTG_HS host channel-1 interrupt register

Fields

XFRC

Transfer completed
CHH

Channel halted
AHBERR

AHB error
STALL

STALL response received interrupt
NAK

NAK response received interrupt
ACK

ACK response received/transmitted interrupt
NYET

Response received interrupt
TXERR

Transaction error
BBERR

Babble error
FRMOR

Frame overrun
DTERR

Data toggle error

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32