Regviz

stm32 /stm32h7 /STM32H730 /COMP1 /OR

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Interpret as OR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AFOP0OR

Description

Comparator option register

Fields

AFOP

Selection of source for alternate function of output ports
OR

Option Register

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32