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stm32 /stm32h7 /STM32H730 /Ethernet_MAC /DMACRxIWTR

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Interpret as DMACRxIWTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RWT

Description

Channel Rx interrupt watchdog timer register

Fields

RWT

Receive Interrupt Watchdog Timer Count

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32