RCC APB2 Sleep Clock Register
| TIM1LPEN | TIM1 peripheral clock enable during CSleep mode |
| TIM8LPEN | TIM8 peripheral clock enable during CSleep mode |
| USART1LPEN | USART1 Peripheral Clocks Enable During CSleep Mode |
| USART6LPEN | USART6 Peripheral Clocks Enable During CSleep Mode |
| UART9LPEN | UART9 peripheral clock enable during CSleep mode Set and reset by software. The peripheral clocks of the UART9 are the kernel clock selected by USART16910SEL and provided to usart_ker_ck input, and the rcc_pclk2 bus interface clock. |
| USART10LPEN | USART10 peripheral clock enable during CSleep mode Set and reset by software. The peripheral clocks of the USART10 are the kernel clock selected by USART16910SEL and provided to usart_ker_ck input, and the rcc_pclk2 bus interface clock. |
| SPI1LPEN | SPI1 Peripheral Clocks Enable During CSleep Mode |
| SPI4LPEN | SPI4 Peripheral Clocks Enable During CSleep Mode |
| TIM15LPEN | TIM15 peripheral clock enable during CSleep mode |
| TIM16LPEN | TIM16 peripheral clock enable during CSleep mode |
| TIM17LPEN | TIM17 peripheral clock enable during CSleep mode |
| SPI5LPEN | SPI5 Peripheral Clocks Enable During CSleep Mode |
| SAI1LPEN | SAI1 Peripheral Clocks Enable During CSleep Mode |
| DFSDM1LPEN | DFSDM1 peripheral clocks enable during CSleep mode Set and reset by software. DFSDM1 peripheral clocks are the kernel clocks selected by SAI1SEL and DFSDM1SEL and provided to Aclk and clk inputs respectively, and the rcc_pclk2 bus interface clock. |