Regviz

stm32 /stm32h7 /STM32H733 /PSSI /PSSI_IER

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PSSI_IER

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h5/STM32H523/PSSI/PSSI_IER#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)OVR_IE

OVR_IE=B_0x0

Description

PSSI interrupt enable register

Fields

OVR_IE

Data buffer overrun/underrun interrupt enable

0 (B_0x0): No interrupt generation

1 (B_0x1): An interrupt is generated if either an overrun or an underrun error occurred.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32