Regviz

stm32 /stm32h7 /STM32H733 /SPI1 /CR2

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Interpret as CR2

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https://regviz.com/r/stm32/stm32h7/STM32H723/SPI1/CR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TSIZE0TSER

Description

control register 2

Fields

TSIZE

Number of data at current transfer
TSER

Number of data transfer extension to be reload into TSIZE just when a previous

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32