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stm32 /stm32h7 /STM32H735 /Ethernet_MAC /MTLQICSR

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Interpret as MTLQICSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TXUNFIS)TXUNFIS 0 (TXUIE)TXUIE 0 (RXOVFIS)RXOVFIS 0 (RXOIE)RXOIE

Description

Queue interrupt control status Register

Fields

TXUNFIS

TXUNFIS
TXUIE

TXUIE
RXOVFIS

RXOVFIS
RXOIE

RXOIE

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32