Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32h7/STM32H723/OCTOSPI1/SR#0x0
status register
Clear transfer error flag
Clear transfer complete flag
FIFO threshold flag
Clear status match flag
Clear timeout flag
Busy
FIFO level
https://github.com/modm-io/cmsis-svd-stm32