PSSI_RIS

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Interpret as PSSI_RIS

OVR_RIS=B_0x0

PSSI raw interrupt status register

OVR_RIS

Data buffer overrun/underrun raw interrupt status This bit is cleared by writing a 1 to the OVR_ISC bit in PSSI_ICR.

0 (B_0x0): No overrun/underrun occurred

1 (B_0x1): An overrun/underrun occurred: overrun in receive mode, underrun in transmit mode.

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