stm32 /stm32h7 /STM32H735 /RCC /BDCR

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Interpret as BDCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSEON)LSEON 0 (LSERDY)LSERDY 0 (LSEBYP)LSEBYP 0LSEDRV 0 (LSECSSON)LSECSSON 0 (LSECSSD)LSECSSD 0RTCSEL 0 (RTCEN)RTCEN 0 (BDRST)BDRST

Description

RCC Backup Domain Control Register

Fields

LSEON

LSE oscillator enabled

LSERDY

LSE oscillator ready

LSEBYP

LSE oscillator bypass

LSEDRV

LSE oscillator driving capability

LSECSSON

LSE clock security system enable

LSECSSD

LSE clock security system failure detection

RTCSEL

RTC clock source selection

RTCEN

RTC clock enable

BDRST

Backup domain software reset

Links

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