Regviz

stm32 /stm32h7 /STM32H73x /OTG1_HS_DEVICE /OTG_HS_DIEPCTL5

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as OTG_HS_DIEPCTL5

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f4/STM32F427/OTG_HS_DEVICE/OTG_HS_DIEPCTL5#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MPSIZ0 (USBAEP)USBAEP 0 (EONUM_DPID)EONUM_DPID 0 (NAKSTS)NAKSTS 0EPTYP 0 (Stall)Stall 0TXFNUM0 (CNAK)CNAK 0 (SNAK)SNAK 0 (SD0PID_SEVNFRM)SD0PID_SEVNFRM 0 (SODDFRM)SODDFRM 0 (EPDIS)EPDIS 0 (EPENA)EPENA

Description

OTG device endpoint-5 control register

Fields

MPSIZ

Maximum packet size
USBAEP

USB active endpoint
EONUM_DPID

Even/odd frame
NAKSTS

NAK status
EPTYP

Endpoint type
Stall

STALL handshake
TXFNUM

TxFIFO number
CNAK

Clear NAK
SNAK

Set NAK
SD0PID_SEVNFRM

Set DATA0 PID
SODDFRM

Set odd frame
EPDIS

Endpoint disable
EPENA

Endpoint enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32