stm32 /stm32h7 /STM32H743 /DFSDM /DFSDM_CHCFG1R2

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Interpret as DFSDM_CHCFG1R2

31282724232019161512118743000000000000000000000000000000000000000000DTRBS0OFFSET

Description

DFSDM channel configuration 1 register 2

Fields

DTRBS

Data right bit-shift for channel 1

OFFSET

24-bit calibration offset for channel 1

Links

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