stm32 /stm32h7 /STM32H743 /SDMMC1 /DCNTR

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Interpret as DCNTR

31282724232019161512118743000000000000000000000000000000000000000000DATACOUNT

Description

The SDMMC_DCNTR register loads the value from the data length register (see SDMMC_DLENR) when the DPSM moves from the Idle state to the Wait_R or Wait_S state. As data is transferred, the counter decrements the value until it reaches 0. The DPSM then moves to the Idle state and when there has been no error, the data status end flag (DATAEND) is set.

Fields

DATACOUNT

Data count value When read, the number of remaining data bytes to be transferred is returned. Write has no effect.

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