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stm32 /stm32h7 /STM32H745_CM7 /LPUART1 /RDR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RDR

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https://regviz.com/r/stm32/stm32f7/STM32F746/USART6/RDR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RDR

Description

Receive data register

Fields

RDR

Receive data value

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32