stm32 /stm32h7 /STM32H747_CM7 /RCC /C1_APB3LPENR

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Interpret as C1_APB3LPENR

31282724232019161512118743000000000000000000000000000000000000000000 (LTDCLPEN)LTDCLPEN0 (WWDG1LPEN)WWDG1LPEN

Description

RCC APB3 Sleep Clock Register

Fields

LTDCLPEN

LTDC peripheral clock enable during CSleep mode

WWDG1LPEN

WWDG1 Clock Enable During CSleep Mode

Links

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