RCC PLLs Configuration Register
| PLL1FRACEN | PLL1 fractional latch enable |
| PLL1VCOSEL | PLL1 VCO selection |
| PLL1RGE | PLL1 input frequency range |
| PLL2FRACEN | PLL2 fractional latch enable |
| PLL2VCOSEL | PLL2 VCO selection |
| PLL2RGE | PLL2 input frequency range |
| PLL3FRACEN | PLL3 fractional latch enable |
| PLL3VCOSEL | PLL3 VCO selection |
| PLL3RGE | PLL3 input frequency range |
| DIVP1EN | PLL1 DIVP divider output enable |
| DIVQ1EN | PLL1 DIVQ divider output enable |
| DIVR1EN | PLL1 DIVR divider output enable |
| DIVP2EN | PLL2 DIVP divider output enable |
| DIVQ2EN | PLL2 DIVQ divider output enable |
| DIVR2EN | PLL2 DIVR divider output enable |
| DIVP3EN | PLL3 DIVP divider output enable |
| DIVQ3EN | PLL3 DIVQ divider output enable |
| DIVR3EN | PLL3 DIVR divider output enable |