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stm32 /stm32h7 /STM32H755_CM4 /ART /CTR

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Interpret as CTR

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https://regviz.com/r/stm32/stm32h7/STM32H745_CM4/ART/CTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0PCACHEADDR

Description

control register

Fields

EN

Cache enable
PCACHEADDR

Cacheable page index

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32