Regviz

stm32 /stm32h7 /STM32H755_CM7 /DBGMCU /APB4FZ2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as APB4FZ2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h7/STM32H723/DBGMCU/APB4FZ2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBG_I2C4)DBG_I2C4 0 (DBG_LPTIM2)DBG_LPTIM2 0 (DBG_LPTIM3)DBG_LPTIM3 0 (DBG_LPTIM4)DBG_LPTIM4 0 (DBG_LPTIM5)DBG_LPTIM5 0 (DBG_RTC)DBG_RTC 0 (DBG_WDGLSD1)DBG_WDGLSD1 0 (DBG_WDGLSD2)DBG_WDGLSD2

Description

DBGMCU APB4 peripheral freeze register CPU2

Fields

DBG_I2C4

I2C4 SMBUS timeout stop in debug
DBG_LPTIM2

LPTIM2 stop in debug
DBG_LPTIM3

LPTIM2 stop in debug
DBG_LPTIM4

LPTIM4 stop in debug
DBG_LPTIM5

LPTIM5 stop in debug
DBG_RTC

RTC stop in debug
DBG_WDGLSD1

LS watchdog for D1 stop in debug
DBG_WDGLSD2

LS watchdog for D2 stop in debug

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32