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stm32 /stm32h7 /STM32H755_CM7 /HRTIM_Common /EECR2

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Interpret as EECR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0EE6SRC 0 (EE6POL)EE6POL 0EE6SNS 0EE7SRC 0 (EE7POL)EE7POL 0EE7SNS 0EE8SRC 0 (EE8POL)EE8POL 0EE8SNS 0EE9SRC 0 (EE9POL)EE9POL 0EE9SNS 0EE10SRC 0 (EE10POL)EE10POL 0EE10SNS

Description

Timer External Event Control Register 2

Fields

EE6SRC

External Event 6 Source
EE6POL

External Event 6 Polarity
EE6SNS

External Event 6 Sensitivity
EE7SRC

External Event 7 Source
EE7POL

External Event 7 Polarity
EE7SNS

External Event 7 Sensitivity
EE8SRC

External Event 8 Source
EE8POL

External Event 8 Polarity
EE8SNS

External Event 8 Sensitivity
EE9SRC

External Event 9 Source
EE9POL

External Event 9 Polarity
EE9SNS

External Event 9 Sensitivity
EE10SRC

External Event 10 Source
EE10POL

External Event 10 Polarity
EE10SNS

External Event 10 Sensitivity

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32