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stm32 /stm32h7 /STM32H755_CM7 /SYSCFG /CFGR

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Interpret as CFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CM4L)CM4L 0 (PVDL)PVDL 0 (FLASHL)FLASHL 0 (CM7L)CM7L 0 (BKRAML)BKRAML 0 (SRAM4L)SRAM4L 0 (SRAM3L)SRAM3L 0 (SRAM2L)SRAM2L 0 (SRAM1L)SRAM1L 0 (DTCML)DTCML 0 (ITCML)ITCML 0 (AXISRAML)AXISRAML

Description

configuration register

Fields

CM4L

CM4L
PVDL

PVDL
FLASHL

FLASHL
CM7L

CM7L
BKRAML

BKRAML
SRAM4L

SRAM4L
SRAM3L

SRAM3L
SRAM2L

SRAM2L
SRAM1L

SRAM1L
DTCML

DTCML
ITCML

ITCML
AXISRAML

AXISRAML

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32