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stm32 /stm32h7 /STM32H755_CM7 /SYSCFG /UR5

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Interpret as UR5

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https://regviz.com/r/stm32/stm32h7/STM32H745_CM4/SYSCFG/UR5#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MESAD_1)MESAD_1 0WRPS_1

Description

SYSCFG user register 5

Fields

MESAD_1

Mass erase secured area disabled for bank 1
WRPS_1

Write protection for flash bank 1

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32